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Quick Facts
| Medium Of Instructions | Mode Of Learning | Mode Of Delivery |
|---|---|---|
| English | Self Study, Virtual Classroom | Video and Text Based |
Course Overview
The Mapping Signal Processing Algorithms to Architectures certification course delves into hardware implementations of Digital Signal Processing (DSP) systems, emphasising VLSI and FPGA technologies. Students explore algorithm analysis and mapping onto custom architectures for optimised operations. Prerequisites include strong fundamentals in Digital Design, DSP, and Processor Architecture.
The Mapping Signal Processing Algorithms to Architectures certification by NPTEL covers a spectrum of topics from basic digital systems to specialised architectures such as Systolic arrays and GPUs. Students gain theoretical insights and practical skills in designing efficient hardware architectures for signal processing tasks. They learn how to translate algorithms into hardware platforms.
The Highlights
- Elective Online Course
- 12 Weeks Duration
- Offered by IIT Madras
Programme Offerings
- Certificate of completion
- Practical Learning
- Hands-on Experience
Courses and Certificate Fees
| Certificate Availability | Certificate Providing Authority |
|---|---|
| yes | IIT Madras (IITM) |
Eligibility Criteria
Academic Qualifications
The Mapping Signal Processing Algorithms to Architectures certification course is intended for students interested in hardware implementations of DSP systems using VLSI/FPGA and custom parallel architectures like GPUs, requiring prior knowledge of Digital Design, Digital Signal Processing, and Processor Architecture at the undergraduate level.
Certification Qualifying Details
To receive the Mapping Signal Processing Algorithms to Architectures certification by NPTEL, you need a minimum average assignment score of 10/25 and an exam score of 30/75.
What you will learn
After completing the Mapping Signal Processing Algorithms to Architectures certification syllabus, you will gain a comprehensive understanding of hardware implementations of Digital Signal Processing (DSP) systems. You will also explore Very Large Scale Integration (VLSI) and Field Programmable Gate Array (FPGA) technologies.
Upon completion of the Mapping Signal Processing Algorithms to Architectures training, you will delve into the analysis of algorithms and learn how to map them onto custom architectures or those with specific extensions tailored for optimised operations. You will explore performance bounds, algorithm analysis techniques, and strategies for efficient mapping onto hardware platforms.
Who it is for
The Mapping Signal Processing Algorithms to Architectures online course is suitable for individuals interested in hardware implementations of Digital Signal Processing (DSP) systems, particularly those utilising Very Large Scale Integration (VLSI) and Field Programmable Gate Array (FPGA) technologies. This course is particularly beneficial for:
Admission Details
Follow these steps to join the Mapping Signal Processing Algorithms to Architectures classes:
Step 1: Browse the URL below:
https://swayam.gov.in/NPTEL
Step 2: Click on the “Sign-in/ Register” button
Step 3: Log in using a Google account-enabled email address
Step 4: Select your preferred course. Review the course details and fill out the required fields
Step 5: Click on the "Join" button
The Syllabus
- Review: Digital systems, DSP, computer architecture
- DSP system models; quality metrics and bounds; number representations
- DSP system models; quality metrics and bounds; number representations (contd)
- Implementation: dedicated hardware; transforms; resource sharing; Scheduling: time and resource bounds; allocation, binding, scheduling; techniques
- Implementation: dedicated hardware; transforms; resource sharing; Scheduling: time and resource bounds; allocation, binding, scheduling; techniques (contd)
- Implementation: dedicated hardware; transforms; resource sharing; Scheduling: time and resource bounds; allocation, binding, scheduling; techniques (contd)
- Architectures: programmable systems; FSMs and microprograms; instruction extensions; peripheral accelerators
- Architectures: programmable systems; FSMs and microprograms; instruction extensions; peripheral accelerators (contd)
- Architectures: programmable systems; FSMs and microprograms; instruction extensions; peripheral accelerators (contd)
- Memory and communication systems: bus structures; DMA; networks-on-chip
- Memory and communication systems: bus structures; DMA; networks-on-chip (contd)
- Specialized architectures: Systolic arrays; CORDIC; GPU
Evaluation process
The Mapping Signal Processing Algorithms to Architectures certification offers an optional exam. Your final score is determined by averaging the best 8 out of 12 assignments (25%) and your proctored exam score (75%).