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Quick Facts
| Medium Of Instructions | Mode Of Learning | Mode Of Delivery |
|---|---|---|
| English | Self Study | Video and Text Based |
Course Overview
The VLSI CAD Part1: Logic course by Coursera has been designed to focus on computer-aided design (CAD), and its major design tools to create an Application Specific Integrated Circuit (ASIC) or a System on Chip (SoC) design. The course begins by shedding light on the key representations of Boolean logic that make it possible to synthesize and verify gate-level logic in designs. We further move along the design chain from logic to layout.
This course teaches students to understand how these tools work at their fundamental algorithms and data structures levels. The Coursera VLSI CAD Part1: Logic course includes topics like Computational Boolean algebra, logic verification, and logic synthesis.
Furthermore, Coursera’s VLSI CAD Part1: The logic programme is an online learning course that allows the students to train at their own convenience and pace. The course has been offered by the University of Illinois at Urbana-Champaign which is known for its programs, academic excellence, and internationally renowned faculty as well as alumni.
The Highlights
- 100% Online
- Flexible deadlines
- Shareable Certificate
- Quiz based
- Graded assignments
- Intermediate-level programme
- Completion in approximately 23 hours
- Practical exercises
- Subtitles in English, Russian, Spanish, Portuguese (Brazilian), and French
Programme Offerings
- online learning
- Shareable Certificate
- Free Trial
- quizzes
- assignments
- practical assignments
- Flexible Deadlines
Courses and Certificate Fees
| Fees Informations | Certificate Availability | Certificate Providing Authority |
|---|---|---|
| INR 5046 | yes | Coursera |
The fees for the VLSI CAD Part 1: Logic course is :
| Course Name | Fees |
| VLSI CAD Part 1 Logic (with certificate) | Rs. 5,046 |
Eligibility Criteria
Since the VLSI CAD Part1: Logic certification course is an intermediate course, there is some prerequisite knowledge that a student must-have. They need to have programming experience (C, C++, Java, Python, etc.) and a basic understanding of algorithms and data structures. Additionally, candidates need to have a comprehensive understanding of basic digital design: gates and flip flops, Boolean algebra, and finite state machine design.
Moreover, candidates should have knowledge of linear algebra and calculus at an engineering level and some exposure to basic VLSI at the undergraduate level.
What you will learn
Upon completion of the Coursera VLSI CAD Part1: Logic course you will have:
- Understanding of Computer-aided design (CAD) and its different parts.
- Familiarity with the basic concepts of VLSI (Very Large Scale Integration).
- Knowledge of the various tools, structures and algorithms that are used in the process of creating an integrated circuit.
- Knowledge of major design tools used in the creation of System on Chip design and Application Specific Integrated Circuit.
- Knowledge of CAD, Logic Gate, Digital Design, and Boolean Algebra
Who it is for
Admission Details
To apply in VLSI CAD Part1: Logic course by Coursera:
- Go to the official website of Coursera.
- User search bar to find out ‘VLSI CAD Part1: Logic course’.
- Click on the ‘Enrol for FREE’ option.
- Sign up for Coursera to avail of the course.
- Those who already have an account can use the details to log in and continue.
Application Details
To join the VLSI CAD Part1: Logic course by Coursera, sign up or log in to the website and then you will be eligible for the course.
The Syllabus
Videos
Welcome and Introduction
Readings
- Syllabus
- Tools For This Course
Assignment
- Demographics Survey
Programming Assignments
- KBDD
- MiniSat
- Espresso
- SIS
Plugin
- Welcome! Please tell us about yourself
Videos
- Computational Boolean Algebra: Basics
- Computational Boolean Algebra: Boolean Differences
- Computational Boolean Algebra: Quantification Operators
- Computational Boolean Algebra: Application to Logic Network Repair
- Computational Boolean Algebra: Recursive Tautology
- Computational Boolean Algebra: Recursive Tautology—URP Implementation
Readings
- Week 1 Overview
- Week 1 Assignments
Videos
- BDD Sharing
- Boolean Constraint Propagation (BCP) for SAT
- BDD Basics - 1
- BDD Basics - 2
- BDD Ordering
- Satisfiability (SAT), Part 1
- Using SAT for Logic
Readings
- Week 2 Overview
- Week 2 Assignments
Assignment
- Problem Set #1
Programming Assignment
- Programming Assignment #1: Unate Recursive Complement
Videos
- 2-Level Logic: Basics
- 2-Level Logic: The Reduce-Expand-Irredundant Optimization Loop
- 2-Level Logic: Details for One Step: Expand
- Multilevel Logic and the Boolean Network Model
- Multilevel Logic: Algebraic Model for Factoring
- Multilevel Logic: Algebraic Division
- Multilevel Logic: Role of Kernels and Co-Kernels in Factoring
- Multilevel Logic: Finding the Kernels
Readings
- Week 3 Overview
- Week 3 Assignments
Assignment
- Problem Set #2
Videos
- Mulitlevel Logic and Divisor Extraction—Single Cube Case
- Mulitlevel Logic and Divisor Extraction—Multiple Cube Case
- Multilevel Logic and Divisor Extraction—Finding Prime Rectangles & Summary
- Multilevel Logic—Implicit Don't Cares, Part 1
- Multilevel Logic—Implicit Don't Cares, Part 2
- Multilevel Logic—Satisfiability Don't Cares
- Multilevel Logic—Controllability Don't Cares
- Multilevel Logic—Observability Don't Cares
Readings
- Week 4 Overview
- Week 4 Assignments
Assignments
- Problem Set #3
- Auxiliary Quiz of Serious BDDs
Programming Assignment
- Programming Assignment #2: Serious BDDs
Assignments
- Problem Set #4
- Final Exam
- End of Course Survey
Plugin
- How was the course?