Amity University | M.Tech Admissions 2025
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Quick Facts
Total Fees 1.14 L | Exam TS PGECET | Seats 18 |
Fees Details
General
₹ 1.14 L
Disclaimer: Data for total fees has been calculated based on all years/semesters as provided by the college. The actual fees may vary.
Course Details
MODE
Full timeDURATION
24 MonthsMasters of technology in VLSI and Embedded Systems Design is a full-time two-year course affiliated to Jawaharlal Nehru Technological University, Hyderabad and approved by AICTE.
Important dates
| Exams and Events | Dates |
|---|
TS PGECET Late Fee Application Date - With late fee of Rs. 2500/- (Mode - Online) | 25 May'25 - 30 May'25 |
TS PGECET Late Fee Application Date - With late fee of Rs. 5000/- (Mode - Online) | 31 May'25 - 2 Jun'25 |
TS PGECET Admit Card Date (Mode - Online) | 6 Jun'25 - 19 Jun'25 |
TS PGECET Exam Date (Mode - Offline) | 15 Jun'25 - 18 Jun'25 |
Eligibility Criteria
Bachelor's degree in Engineering/Technology from any recognized University in the concerned discipline.
Admission Details
The student must qualify the TSPGCET examination which is conducted by the Government of Telangana. TSPGCET is an intrastate competitive exam for the Post Graduation Degree. Depending on the rank and the student’s preference, the student can choose the appropriate program and college of his/her choice that is offered by the group.
Top Exams Accepted by Sagar Institute of Technology, Hyderabad
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